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Relax the clearance calculating for breaking partial register dependency.
authorDehao Chen <dehao@google.com>
Tue, 28 Jun 2016 21:19:34 +0000 (21:19 +0000)
committerDehao Chen <dehao@google.com>
Tue, 28 Jun 2016 21:19:34 +0000 (21:19 +0000)
commit527613bc4ed9497353e75d19c3273ef08a7c8082
tree5ec0744f9c08073dc13415403ccb4551795db654
parentefed5fba6822584741d3a3bb9630bbf376239571
Relax the clearance calculating for breaking partial register dependency.

Summary: LLVM assumes that large clearance will hide the partial register spill penalty. But in our experiment, 16 clearance is too small. As the inserted XOR is normally fairly cheap, we should have a higher clearance threshold to aggressively insert XORs that is necessary to break partial register dependency.

Reviewers: wmi, davidxl, stoklund, zansari, myatsina, RKSimon, DavidKreitzer, mkuper, joerg, spatel

Subscribers: davidxl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21560

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274068 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.cpp
test/CodeGen/X86/vec_int_to_fp.ll