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AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 25 Jun 2018 16:17:48 +0000 (16:17 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 25 Jun 2018 16:17:48 +0000 (16:17 +0000)
commit529b26551c9dd0420eb19801464708de507c6133
treec4d91c56c4f477c06b13215334b8379075c159adtree | snapshot
parenta26c784064a6e32b1873f5f25a1ea7bb99e4287bcommit | diff
AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr

Note a normal select test is not currently possible because this
relies on input registers tracked in SIMachineFunctionInfo which
are not currently serializable in MIR, but this does work end-to-end
from the IR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335490 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp diff | blob | history
lib/Target/AMDGPU/AMDGPUInstructionSelector.h diff | blob | history
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.kernarg.segment.ptr.mir [new file with mode: 0644] blob
test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kernarg.segment.ptr.mir [new file with mode: 0644] blob
external/llvm
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