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clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036
authorHeiko Stuebner <heiko@sntech.de>
Wed, 1 Mar 2017 21:00:41 +0000 (22:00 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 14 May 2017 12:00:19 +0000 (14:00 +0200)
commit52dd14d76812be2c98f0ad54be2fd8d375f5d627
tree7de2a4fcb27745aa541f281b721db22bd88025ac
parent6fa44d4ba2126f3e56c6cd39cf54991bbf3bbc46
clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036

commit 9b1b23f03abdd25ffde8bbfe5824b89bc0448c28 upstream.

The mux_pll_src_apll_dpll_gpll_usb480m_p parent list was missing a ","
between the 3rd and 4th parent names, making them fall together and thus
lookups fail. Fix that.

Fixes: 5190c08b2989 ("clk: rockchip: add clock controller for rk3036")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/rockchip/clk-rk3036.c