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[misched] Extend scheduler to handle unsupported features
authorSimon Dardis <simon.dardis@imgtec.com>
Thu, 23 Jun 2016 09:22:11 +0000 (09:22 +0000)
committerSimon Dardis <simon.dardis@imgtec.com>
Thu, 23 Jun 2016 09:22:11 +0000 (09:22 +0000)
commit53391f414b89a1bd55143e7af5dc84002bc22db8
treecdc67ad20497789e8accfec95fb39bc4d984e5ee
parenta4a23eae96a0167e5607b12afe1abdaaf36a1465
[misched] Extend scheduler to handle unsupported features

Currently isComplete = 1 requires that every instruction must
be described, declared unsupported or marked as having no
scheduling information for a processor.

For some backends such as MIPS, this requirement entails
long regex lists of instructions that are unsupported.

This patch teaches Tablegen to skip over instructions that
are associated with unsupported feature when checking if the
scheduling model is complete.

Patch by: Daniel Sanders

Contributions by: Simon Dardis

Reviewers: MatzeB

Differential Reviewer: http://reviews.llvm.org/D20522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273551 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetSchedule.td
utils/TableGen/CodeGenSchedule.cpp
utils/TableGen/CodeGenSchedule.h