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drm/i915/guc: Correctly handle GuC interrupts on Gen11
authorOscar Mateo <oscar.mateo@intel.com>
Mon, 27 May 2019 18:36:08 +0000 (18:36 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 28 May 2019 09:07:17 +0000 (10:07 +0100)
commit54c52a8412501fe84bccc28bd443a29cdd3f84a1
tree7aa00de9e7b840da34ed5f5d4631080853f95aaa
parent1e83e7a66d139e0568a395d9b4bbdee97c5e881b
drm/i915/guc: Correctly handle GuC interrupts on Gen11

Starting Gen11 GuC shares interrupt registers with SG unit
instead of PM. But for now we don't care about SG interrupts.

v2: (Chris)
v3: rebased (Michal)
v4: more bspec pages, use macros, update commit msg (Michal Wi)

Bspec: 19820, 19840, 19841, 20176

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: MichaƂ Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-13-michal.wajdeczko@intel.com
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_irq.h
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_guc.c
drivers/gpu/drm/i915/intel_guc_reg.h