USB: dwc3: Add support for fixing superspeed enumeration issue

USB: dwc3: Add support for fixing superspeed enumeration issue

Setting SSPHY SUSP bit (bit 17) in GUSB3PIPECTL(0) register
might cause device enumerating at high speed mode instead of
superspeed mode on some platforms. Hence add workaround by
clearing the SSPHY SUSP bit during disconnect and setting it
after it is configured to fix this enumeration issue on those
platforms.

Also add support for disabling U1 and U2 low power modes  which
could also affect this enumeration issue.

CRs-Fixed: 637902
Change-Id: I8668ced09a88b77f37265ab15e89fa9e964bfbe9
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
[jackp@codeaurora.org: only add u1/u2 disable bits]
Signed-off-by: Jack Pham <jackp@codeaurora.org>