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(parent: 42cf244) | patch
riscv: dts: add initial support for the SiFive FU740-C000 SoC
authorYash Shah <yash.shah@sifive.com>
Tue, 8 Dec 2020 04:55:39 +0000 (10:25 +0530)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Fri, 8 Jan 2021 01:37:38 +0000 (17:37 -0800)
commit57985788158a5a6b77612e531b9d89bcad06e47c
treea336c6f93ea08a28f5219e3686411d9fb23eeca6tree | snapshot
parent42cf244c8f03cc8a801333fe2fa3b7efa760d119commit | diff
riscv: dts: add initial support for the SiFive FU740-C000 SoC

Add initial support for the SiFive FU540-C000 SoC. FU740-C000 is built
around the SiFIve U7 Core Complex and a TileLink interconnect.

This file is expected to grow as more device drivers are added to the
kernel.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/boot/dts/sifive/fu740-c000.dtsi [new file with mode: 0644] blob
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