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clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks
authorJohan Jonker <jbx6244@gmail.com>
Wed, 18 Nov 2020 13:58:16 +0000 (14:58 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 29 Nov 2020 19:10:44 +0000 (20:10 +0100)
commit5868491e1257786628fdd2457dfb77609f49f91d
treee5bfd293c079db123d47de750d07221e347f542a
parent7f5b57a095f3b9532793d143655e83433bb448af
clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks

Add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks,
so that the parent COMPOSITE_FRACMUX and COMPOSITE_NOMUX
also update.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201118135822.9582-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3188.c