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TableGen/GlobalISel: Fix handling of truncstore patterns
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 15 Jul 2019 21:15:20 +0000 (21:15 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 15 Jul 2019 21:15:20 +0000 (21:15 +0000)
commit59e121a7ce9a7ab790bf2484f98e261afeb8ab08
treee7eb560d029643b0bcadb45ac420fbeafde054ff
parent4783e3ce2b3c1115d149839d5ed61955f7ea627f
TableGen/GlobalISel: Fix handling of truncstore patterns

This was failing to import the AMDGPU truncstore patterns. The
truncating stores from 32-bit to 8/16 were then somehow being
incorrectly selected to a 4-byte store.

A separate check is emitted for the LLT size in comparison to the
specific memory VT, which looks strange to me but makes sense based on
the hierarchy of PatFrags used for the default truncstore PatFrags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366129 91177308-0d34-0410-b5e6-96231b3b80d8
test/TableGen/address-space-patfrags.td
utils/TableGen/GlobalISelEmitter.cpp