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(parent: c973660) | patch
phy: qcom-qmp: pcs-ufs: Add v6 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Tue, 17 Jan 2023 22:41:47 +0000 (00:41 +0200)
committerVinod Koul <vkoul@kernel.org>
Thu, 2 Feb 2023 13:03:20 +0000 (18:33 +0530)
commit5b8154ce500944c6d70c5d3189341c47e5efb4f8
tree794530f25e98bcd670be73a91577091f63b7ab97tree | snapshot
parentc9736600a64f7d9b374838d065ef85f6bf6c3dd4commit | diff
phy: qcom-qmp: pcs-ufs: Add v6 register offsets

The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB,
UFS and PCIE g3x2. Add the new PCS UFS specific offsets in a dedicated
header file.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230117224148.1914627-6-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h [new file with mode: 0644] blob
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c diff | blob | history
This is a test repository.
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