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drm/i915/guc: Add GuC ADS - MMIO reg state
authorAlex Dai <yu.dai@intel.com>
Fri, 18 Dec 2015 20:00:11 +0000 (12:00 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 5 Jan 2016 10:34:41 +0000 (11:34 +0100)
commit5c148e044e55304073de3cc2b41c80b1a780687f
tree7a8eb1e8ff27f1d9c961e6018ce255dc9ae2fbe2
parent463704d07f4cb0767714a67eaaf1ee47eef36fd8
drm/i915/guc: Add GuC ADS - MMIO reg state

GuC needs to know which registers and how they will be saved and
restored during event such as engine reset or power state changes.
For now only the base address of reg state is initialized. The
detail register table probably will be setup in future GuC TDR or
Preemption patch series.

Signed-off-by: Alex Dai <yu.dai@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450468812-4882-5-git-send-email-yu.dai@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_guc_submission.c
drivers/gpu/drm/i915/intel_guc_fwif.h