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(parent: 836b547) | patch
[DAGCombiner] allow hoisting vector bitwise logic ahead of extends
authorSanjay Patel <spatel@rotateright.com>
Sun, 23 Dec 2018 19:58:16 +0000 (19:58 +0000)
committerSanjay Patel <spatel@rotateright.com>
Sun, 23 Dec 2018 19:58:16 +0000 (19:58 +0000)
commit5d87a4a6994229ec71df56fb548a910a820fed80
treedd9977ff5cbca2b22410ab5965c3e41baacf02a5tree | snapshot
parent836b5476046a940e45d15e14dd7fa86220218c26commit | diff
[DAGCombiner] allow hoisting vector bitwise logic ahead of extends

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350032 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
test/CodeGen/X86/vector-ext-logic.ll diff | blob | history
external/llvm
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