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rtc: jz4740: Register clock provider for the CLK32K pin
authorPaul Cercueil <paul@crapouillou.net>
Sun, 29 Jan 2023 12:04:42 +0000 (12:04 +0000)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Thu, 9 Feb 2023 22:38:00 +0000 (23:38 +0100)
commit5ddfa148de8cf5491fd1c89522c7cad859db8c88
treef2a8edf51c96d2c1a203e2da6639c386aa35b862
parentff6fd3770e9687d7b849a0e826a32563bfcb98da
rtc: jz4740: Register clock provider for the CLK32K pin

On JZ4770 and JZ4780, the CLK32K pin is configurable. By default, it is
configured as a GPIO in input mode, and its value can be read through
GPIO PD14.

With this change, clients can now request the 32 kHz clock on the CLK32K
pin, through Device Tree. This clock is simply a pass-through of the
input oscillator's clock with enable/disable operations.

This will permit the WiFi/Bluetooth chip to work on the MIPS CI20 board,
which does source one of its clocks from the CLK32K pin.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20230129120442.22858-5-paul@crapouillou.net
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
drivers/rtc/Kconfig
drivers/rtc/rtc-jz4740.c