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drm/i915/dsi: refine send MIPI DCS command sequence
authorLee Shawn C <shawn.c.lee@intel.com>
Wed, 8 Sep 2021 11:56:04 +0000 (19:56 +0800)
committerVandita Kulkarni <vandita.kulkarni@intel.com>
Wed, 8 Sep 2021 14:04:39 +0000 (19:34 +0530)
commit5ebd50d3948ee596db02399a09b4561ed82aee57
tree8f259913b1d3c02a1760aad61a34e8fc87be320f
parent43315f86a3a59255463d14042f2974d134710d9c
drm/i915/dsi: refine send MIPI DCS command sequence

According to chapter "Sending Commands to the Panel" in bspec #29738
and #49188. If driver try to send DCS long pakcet, we have to program
TX payload register at first. And configure TX header HW register later.
DSC long packet would not be sent properly if we don't follow this
sequence.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: William Tseng <william.tseng@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210908115607.9633-3-shawn.c.lee@intel.com
drivers/gpu/drm/i915/display/icl_dsi.c