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AArch64: Implement missed conditional compare sequences.
authorBalaram Makam <bmakam@codeaurora.org>
Mon, 1 Feb 2016 19:13:07 +0000 (19:13 +0000)
committerBalaram Makam <bmakam@codeaurora.org>
Mon, 1 Feb 2016 19:13:07 +0000 (19:13 +0000)
commit60101204f11bfd492093b728a7d95a782511cd78
tree9838358dcc358f50b5f01b6a26c3326cd4a9d809
parent7f7276a903542f29b49929d8a328dbf029033b58
AArch64: Implement missed conditional compare sequences.

Summary:
This is an extension to the existing implementation of r242436 which
restricts to only select inputs. This version fixes missed opportunities
in pr26084 by attempting to lower conditional compare sequences of
and/or trees with setcc leafs. This will additionaly handle the case
when a tree with select input is not a conjunction-disjunction tree
but some of the sub trees are conjunction-disjunction trees.

Reviewers: jmolloy, t.p.northover, mcrosier, MatzeB

Subscribers: mcrosier, llvm-commits, junbuml, haicheng, mssimpso, gberry

Differential Revision: http://reviews.llvm.org/D16291

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259387 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/Target/AArch64/AArch64ISelLowering.cpp
lib/Target/AArch64/AArch64ISelLowering.h
test/CodeGen/AArch64/arm64-ccmp.ll