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(parent: 3b0107c) | patch
ARM: debug: enable UART1 for socfpga Cyclone5
authorClément Péron <peron.clem@gmail.com>
Tue, 9 Oct 2018 11:28:37 +0000 (13:28 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 13 Dec 2019 07:52:08 +0000 (08:52 +0100)
commit614348676cb945b8dfccaa37cff491880be01277
tree2cba51c5553e08dcb3c607764154be5d6104cd68tree | snapshot
parent3b0107ca80fbd03991ad568ef14fe13199703592commit | diff
ARM: debug: enable UART1 for socfpga Cyclone5

[ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ]

Cyclone5 and Arria10 doesn't have the same memory map for UART1.

Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/Kconfig.debug diff | blob | history
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