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(parent: ec06e9a) | patch
allow SRL to simplify its operands, as it doesn't demand all bits as input.
authorChris Lattner <sabre@nondot.org>
Wed, 18 Apr 2007 03:06:49 +0000 (03:06 +0000)
committerChris Lattner <sabre@nondot.org>
Wed, 18 Apr 2007 03:06:49 +0000 (03:06 +0000)
commit61a4c072b9407983df1a6c965ada57474766b282
treeadab0cf1e7c75eb0e49854dc082907403a0edd41tree | snapshot
parentec06e9a6707b9b00889e34ebad7cd3f20cb70bb6commit | diff
allow SRL to simplify its operands, as it doesn't demand all bits as input.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
external/llvm
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