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hw/cxl: Fix and use same calculation for HDM decoder block size everywhere
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Wed, 13 Sep 2023 13:25:22 +0000 (14:25 +0100)
committerMichael S. Tsirkin <mst@redhat.com>
Wed, 4 Oct 2023 22:15:06 +0000 (18:15 -0400)
commit61c44bcf510f4db51c28d0288e528cfdf0ebabc3
tree2426a8ce0d8a5f96fe3e6589343344d8c95c902a
parent87de174ac49acaa37264e38129596c9819e4a2c5
hw/cxl: Fix and use same calculation for HDM decoder block size everywhere

In order to avoid having the size of the per HDM decoder register block
repeated in lots of places, create the register definitions for HDM
decoder 1 and use the offset between the first registers in HDM decoder 0 and
HDM decoder 1 to establish the offset.

Calculate in each function as this is more obvious and leads to shorter
line lengths than a single #define which would need a long name
to be specific enough.

Note that the code currently only supports one decoder, so the bugs this
fixes don't actually affect anything.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230913132523.29780-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
hw/cxl/cxl-component-utils.c
hw/cxl/cxl-host.c
hw/mem/cxl_type3.c
include/hw/cxl/cxl_component.h