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[X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend...
authorCraig Topper <craig.topper@intel.com>
Thu, 25 Jun 2020 17:08:03 +0000 (10:08 -0700)
committerCraig Topper <craig.topper@intel.com>
Thu, 25 Jun 2020 18:25:35 +0000 (11:25 -0700)
commit636d31a5c341ff2ca5eefd6075ff059eb60b5a80
treeefc861733bdbbe4e290aed313b223aeec6bbf942
parent821271ea27e312cd3252457a1bac891bc36880b9
[X86] Don't imply -mprfchw when -m3dnow is specified. Enable prefetchw in the backend with 3dnow feature.

The PREFETCHW instruction was originally part of the 3DNow. But
it was given its own CPUID bit on later CPUs just before 3DNow
was deprecated.

We were setting the -mprfchw flag if -m3dnow was passed or the CPU
supported 3dnow unless -mno-prfchw was passed. But -march=native
on a CPU without the PRFCHW CPUID bit set will pass -mno-prfchw.
So -march=k8 will behave differently than -march=native on a K8
for example.

So remove this implicit setting from the frontend and instead
enable the backend to use PREFETCHW if 3dnow OR prfchw is enabled.

Also enable PRFCHW flag on amdfam10/barcelona which seems to be
where this CPUID bit was introduced. That CPU also supported
3dnow.
clang/lib/Basic/Targets/X86.cpp
clang/test/Preprocessor/predefined-arch-macros.c
llvm/lib/Target/X86/X86.td
llvm/lib/Target/X86/X86InstrInfo.td
llvm/lib/Target/X86/X86Subtarget.h
llvm/test/CodeGen/X86/prefetch.ll