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octeontx2-af: cn10k: add workaround for ptp errata
authorNaveen Mamindlapalli <naveenm@marvell.com>
Mon, 21 Feb 2022 06:45:08 +0000 (12:15 +0530)
committerDavid S. Miller <davem@davemloft.net>
Mon, 21 Feb 2022 13:07:48 +0000 (13:07 +0000)
commit6426fc3abab9cde18388bbf67ed8b9a0b6957e52
tree736f9feb21b7afd15a0a0ec3e4086d4042baefd3
parent74c1b2338e0e6fa2b84abbdf6bf0e4d5113b6eea
octeontx2-af: cn10k: add workaround for ptp errata

This patch adds workaround for PTP errata given below.

1. At the time of 1 sec rollover of nano-second counter,
   the nano-second counter is set to 0. However, it should
   be set to (existing counter_value - 10^9). This leads to
   an accumulating error in the timestamp value with each sec
   rollover.
2. Additionally, the nano-second counter currently is rolling
   over at 'h3B9A_C9FF. It should roll over at 'h3B9A_CA00.

The workaround for issue #1 is to speed up the ptp clock by
adjusting PTP_CLOCK_COMP register to the desired value to
compensate for the nanoseconds lost per each second.

The workaround for issue #2 is to slow down the ptp clock
such that the rollover occurs at ~1sec.

Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/octeontx2/af/ptp.c