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[X86] Adjust tablegen includes so we can use Instructions in scheduler models instead...
authorCraig Topper <craig.topper@intel.com>
Sun, 10 Dec 2017 17:42:36 +0000 (17:42 +0000)
committerCraig Topper <craig.topper@intel.com>
Sun, 10 Dec 2017 17:42:36 +0000 (17:42 +0000)
commit64b3a01ea3da023328aeb60cb62073ad412ab4bb
tree3d580a02ad135b4423b38360d557765b97b3b898
parentac349fb9d87d1a0344ec2b8897788e794ccdd455
[X86] Adjust tablegen includes so we can use Instructions in scheduler models instead of just instregexs.

This separates the CPU specific scheduler model includes to occur after the instructions. Moves the instruction includes between the basic scheduler information and the CPU specific scheduler models.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320313 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86.td
lib/Target/X86/X86Schedule.td