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ath9k: Initialize pll_pwrsave for AR9462/AR9565
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Mon, 9 Mar 2015 08:50:08 +0000 (14:20 +0530)
committerKalle Valo <kvalo@codeaurora.org>
Fri, 13 Mar 2015 13:19:32 +0000 (15:19 +0200)
commit656cd75c387383fe3a63e21204107abf5515ecfc
treeca9356beb6c45d35f59d62d888a9180235dd35c3tree | snapshot
parentafa7e6dbd91d3d9e18d224116353087082479dc5commit | diff
ath9k: Initialize pll_pwrsave for AR9462/AR9565

Cards based on AR9462/AR9565 support more PCIE
power save mechanisms, so register them correctly.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/ath9k/hw.c diff | blob | history
drivers/net/wireless/ath/ath9k/hw.h diff | blob | history
drivers/net/wireless/ath/ath9k/init.c diff | blob | history
Mirror: https://github.com/0ranko0P/kernel_xiaomi_msm8998/
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