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[X86][SSE] Relax type assertions for matchVectorShuffleAsInsertPS
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 10 Jul 2016 22:26:05 +0000 (22:26 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 10 Jul 2016 22:26:05 +0000 (22:26 +0000)
commit668cef03499627bb3c59011074bb55d557024481
tree6ae40f5f4654cee862a6829328d1a0aa8e5913bbtree | snapshot
parent772d8502adb73de6cd0fb0320cd3da48e86b4c04commit | diff
[X86][SSE] Relax type assertions for matchVectorShuffleAsInsertPS

Calls to matchVectorShuffleAsInsertPS only need to ensure the inputs are 128-bit vectors. Only lowerVectorShuffleAsInsertPS needs to ensure that they are v4f32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275028 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
external/llvm
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