OSDN Git Service

[AArch64] Add ARMv8.2-A FP16 scalar instructions
authorOliver Stannard <oliver.stannard@arm.com>
Fri, 27 Nov 2015 13:04:48 +0000 (13:04 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Fri, 27 Nov 2015 13:04:48 +0000 (13:04 +0000)
commit67e4e5d0d5eb072f746afc0231267e074de571ef
tree7f6271437ec0f77cbb76b7be9c5e82a6efb4e0a2
parent7fe65325391a0e349567d5ec386b46a341ae374d
[AArch64] Add ARMv8.2-A FP16 scalar instructions

ARMv8.2-A adds 16-bit floating point versions of all existing VFP
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.

Most of these instructions are the same as the 32- and 64-bit versions,
but with the type field (bits 23-22) set to 0b11. Previously the top bit
of the size field was always 0, so the instruction classes only provided
a 1-bit size field, which I have widened to 2 bits.

Differential Revision: http://reviews.llvm.org/D15014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254198 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64InstrFormats.td
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
test/MC/AArch64/arm64-fp-encoding.s
test/MC/AArch64/basic-a64-diagnostics.s
test/MC/Disassembler/AArch64/arm64-scalar-fp.txt
test/MC/Disassembler/AArch64/basic-a64-instructions.txt
test/MC/Disassembler/AArch64/fullfp16-neg.txt [new file with mode: 0644]