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target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 10 May 2018 17:10:57 +0000 (18:10 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 10 May 2018 17:10:57 +0000 (18:10 +0100)
commit68412d2ecedbab5a43b0d346cddb27e00d724aff
treef781fc20d49ccc1cafa862dcaa91395b35a23f97
parent3e281df1e1d17773cc212fa8cd7794957cee1a7d
target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode

The insns in the ARMv8.1-Atomics are added to the existing
load/store exclusive and load/store reg opcode spaces.
Rearrange the top-level decoders for these to accomodate.
The Atomics insns themselves still generate Unallocated.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180508151437.4232-8-richard.henderson@linaro.org
[PMM: Drop the ARM_FEATURE_V8_1 feature flag]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
linux-user/elfload.c
target/arm/cpu.h
target/arm/translate-a64.c