OSDN Git Service

[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 25 Jun 2019 10:51:15 +0000 (10:51 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 25 Jun 2019 10:51:15 +0000 (10:51 +0000)
commit691701d2f8aea47c36cad4769b906bd06c48c86b
tree3f4caa9b4f65b98db2e45450f2c4ba07954ab724
parent7074daff3e57f344201892f12166c55f32986e7b
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND

As part of the fix for rL364264 + rL364272 - limit the *_EXTEND conversion to !TLO.LegalOperations || isOperationLegal cases.

We'll improve X86 legality in future commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364290 91177308-0d34-0410-b5e6-96231b3b80d8
21 files changed:
lib/CodeGen/SelectionDAG/TargetLowering.cpp
test/CodeGen/X86/avx512-ext.ll
test/CodeGen/X86/avx512-fma.ll
test/CodeGen/X86/avx512-insert-extract.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/avx512-masked-memop-64-32.ll
test/CodeGen/X86/avx512-vec-cmp.ll
test/CodeGen/X86/masked_compressstore.ll
test/CodeGen/X86/masked_expandload.ll
test/CodeGen/X86/masked_gather_scatter.ll
test/CodeGen/X86/masked_load.ll
test/CodeGen/X86/pmul.ll
test/CodeGen/X86/pr30284.ll
test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
test/CodeGen/X86/setcc-lowering.ll
test/CodeGen/X86/vector-reduce-and-bool.ll
test/CodeGen/X86/vector-reduce-or-bool.ll
test/CodeGen/X86/vector-reduce-xor-bool.ll
test/CodeGen/X86/vector-shuffle-512-v16.ll
test/CodeGen/X86/vector-shuffle-512-v8.ll
test/CodeGen/X86/vector-shuffle-v1.ll