Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf1' into staging

Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf1' into staging

RISC-V Patches for the 3.1 Soft Freeze, Part 2

This tag contains a few simple patches that I'd like to target for the
QEMU soft freeze.  There's only one code change: a fix to our PMP
implementation that avoids an internal truncation while computing a
partial PMP read.

I also have two updates to the MAINTAINERS file: one to add Alistair as
a RISC-V maintainer, and one to add our newly created mailing list.

# gpg: Signature made Tue 30 Oct 2018 18:17:17 GMT
# gpg:                using RSA key EF4CA1502CCBAB41
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>"
# gpg:                 aka "Palmer Dabbelt <palmer@sifive.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41

* remotes/riscv/tags/riscv-for-master-3.1-sf1:
  Add qemu-riscv@nongnu.org as the RISC-V list
  Add Alistair as a RISC-V Maintainer
  target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>