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author	Matt Arsenault <Matthew.Arsenault@amd.com>
	Tue, 18 Jun 2019 13:19:57 +0000 (13:19 +0000)
committer	Matt Arsenault <Matthew.Arsenault@amd.com>
	Tue, 18 Jun 2019 13:19:57 +0000 (13:19 +0000)
commit	6a59b73682654043e0be54ba181cfed4afdb5147
tree	394e05aab3f5a0f7da6a7a43fad5715e7a6e552e	tree \| snapshot
parent	919946cec1b59c04d977927bd4185a19d8b05598	commit \| diff

AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics

There may or may not be additional work to handle this correctly on
SI/CI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363678 91177308-0d34-0410-b5e6-96231b3b80d8

12 files changed:

include/llvm/IR/IntrinsicsAMDGPU.td		diff \| blob \| history
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp		diff \| blob \| history
lib/Target/AMDGPU/DSInstructions.td		diff \| blob \| history
lib/Target/AMDGPU/SIISelLowering.cpp		diff \| blob \| history
lib/Target/AMDGPU/SIInsertWaitcnts.cpp		diff \| blob \| history
lib/Target/AMDGPU/SIInstrInfo.cpp		diff \| blob \| history
lib/Target/AMDGPU/SIMachineFunctionInfo.h		diff \| blob \| history
test/CodeGen/AMDGPU/gws-hazards.mir	[new file with mode: 0644]	blob
test/CodeGen/AMDGPU/insert-skips-gws.mir	[new file with mode: 0644]	blob
test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll	[new file with mode: 0644]	blob
test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll	[new file with mode: 0644]	blob
test/CodeGen/AMDGPU/tail-duplication-convergent.ll		diff \| blob \| history

external/llvm

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