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pci: Disallow improper BAR registration for type 1
authorBen Widawsky <ben.widawsky@intel.com>
Thu, 15 Oct 2020 18:14:11 +0000 (11:14 -0700)
committerMichael S. Tsirkin <mst@redhat.com>
Fri, 30 Oct 2020 10:48:53 +0000 (06:48 -0400)
commit6a5b19ca63b1795011f53244f2fd9a2cf8189b72
tree07be0522f584675c2589ecb11618eea0578d0028
parent2c729dc8ceaab88f213c7724de0fa181ffc7f078
pci: Disallow improper BAR registration for type 1

Prevent future developers working on root complexes, root ports, or
bridges that also wish to implement a BAR for those, from shooting
themselves in the foot. PCI type 1 headers only support 2 base address
registers. It is incorrect and difficult to figure out what is wrong
with the device when this mistake is made. With this, it is immediate
and obvious what has gone wrong.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Message-Id: <20201015181411.89104-2-ben.widawsky@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
hw/pci/pci.c