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(parent: cd7a155) | patch
More direct types in PowerPC AltiVec intrinsics.
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 3 Apr 2013 14:08:13 +0000 (14:08 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 3 Apr 2013 14:08:13 +0000 (14:08 +0000)
commit6b9d52eefd3e7d57618c0b7e84f0297298a5a65f
tree782cabaf1ee4c33538c06fbdb1f546b247319a2atree | snapshot
parentcd7a1558edd0bdae770c57b82b32291e54e014b2commit | diff
More direct types in PowerPC AltiVec intrinsics.

This patch follows up on work done by Bill Schmidt in r178277,
and replaces most of the remaining uses of VRRC in ISEL DAG patterns.

The resulting .inc files are identical except for comments, so
no change in code generation is expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178656 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
external/llvm
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