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(parent: 30c7e5b) | patch
x86/time: Unconditionally register legacy timer interrupt
authorPeter Zijlstra <peterz@infradead.org>
Fri, 22 Dec 2017 09:20:12 +0000 (10:20 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Sun, 14 Jan 2018 19:18:23 +0000 (20:18 +0100)
commit6d671e1b85c63e7a337ba76c1a154c091545cff8
tree7093ebb0bdc7c2162b5cbbf1c04119056090a427tree | snapshot
parent30c7e5b123673d5e570e238dbada2fb68a87212ccommit | diff
x86/time: Unconditionally register legacy timer interrupt

Even without a PIC/PIT the legacy timer interrupt is required for HPET in
legacy replacement mode.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: len.brown@intel.com
Cc: rui.zhang@intel.com
Link: https://lkml.kernel.org/r/20171222092243.382623763@infradead.org
arch/x86/kernel/time.c diff | blob | history
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