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drm/i915/gem: Try an alternate engine for relocations
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 1 May 2020 19:29:45 +0000 (20:29 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 1 May 2020 21:56:16 +0000 (22:56 +0100)
commit6f576d6277ce5e3aaf2f35b2410220019c3d3cd9
treea2b80ee7fd9e02f254191343667d89b7c1985662
parent0e97fbb080553102af98296382c45e89e2ad8dbc
drm/i915/gem: Try an alternate engine for relocations

If at first we don't succeed, try try again.

Not all engines may support the MI ops we need to perform asynchronous
relocation patching, and so we end up falling back to a synchronous
operation that has a liability of blocking. However, Tvrtko pointed out
we don't need to use the same engine to perform the relocations as we
are planning to execute the execbuf on, and so if we switch over to a
working engine, we can perform the relocation asynchronously. The user
execbuf will be queued after the relocations by virtue of fencing.

This patch creates a new context per execbuf requiring asynchronous
relocations on an unusable engines. This is perhaps a bit excessive and
can be ameliorated by a small context cache, but for the moment we only
need it for working around a little used engine on Sandybridge, and only
if relocations are actually required to an active batch buffer.

Now we just need to teach the relocation code to handle physical
addressing for gen2/3, and we should then have universal support!

Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Testcase: igt/gem_exec_reloc/basic-spin # snb
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200501192945.22215-3-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c