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ARM: 8494/1: mm: Enable PXN when running non-LPAE kernel on LPAE processor
authorJungseung Lee <js07.lee@samsung.com>
Tue, 29 Dec 2015 04:47:00 +0000 (05:47 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 3 Apr 2019 04:23:20 +0000 (06:23 +0200)
commit7276c3fbd3b680df29732e443780de6117546b9e
treed574f81033c0925d36f709362e7f31b94d7fbac0
parent717da8c75b412e6873259ccc878a99fc932ac969
ARM: 8494/1: mm: Enable PXN when running non-LPAE kernel on LPAE processor

[ Upstream commit ad84f56bf6d620fe6ed4d57ce6ec9945684d7f35 ]

The VMSA field of MMFR0 (bottom 4 bits) is incremented for each
added feature.  PXN is supported if the value is >= 4 and LPAE
is supported if it is >= 5.

In case a kernel with CONFIG_ARM_LPAE disabled is used on a
processor that supports LPAE, we can still use PXN in short
descriptors.  So check for >= 4 not == 4.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/mm/mmu.c