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[X86] Strengthen type constraints on some specialized X86 ISD opcodes that don't...
authorCraig Topper <craig.topper@intel.com>
Wed, 15 May 2019 21:16:28 +0000 (21:16 +0000)
committerCraig Topper <craig.topper@intel.com>
Wed, 15 May 2019 21:16:28 +0000 (21:16 +0000)
commit732c2541cd519da3d6844e722d81c5bbfb45818e
tree924ce7c2834453d05b8ffff2641d73cc003b4e55tree | snapshot
parentbca5cee306540f8077979537f632bde807d08d81commit | diff
[X86] Strengthen type constraints on some specialized X86 ISD opcodes that don't have any flexibility. NFC

These particular instructions only operate on 128-bit vectors and have no wider equivalents. And the
element size is always known.

One could argue that MOVSS/MOVSD could be merged, but that's probably disruptive to code in
X86ISelLowering and probably low value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360815 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrFragmentsSIMD.td diff | blob | history
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