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AMDGPU: Split MUBUF offset into aligned components
authorNicolai Haehnle <nhaehnle@gmail.com>
Tue, 10 Oct 2017 12:22:23 +0000 (12:22 +0000)
committerNicolai Haehnle <nhaehnle@gmail.com>
Tue, 10 Oct 2017 12:22:23 +0000 (12:22 +0000)
commit73de2f1810fe717c6bf56724d59de6ce32c23dea
tree4a83671e89cf1d00bf223df6117013b3acfb8dd1
parent269a7003bb6f9ef2e88a77d28bc12cc7c48dd787
AMDGPU: Split MUBUF offset into aligned components

Summary:
Atomic buffer operations do not work (and trap on gfx9) when the
components are unaligned, even if their sum is aligned.

Previously, we generated an offset of 4156 without an SGPR by
splitting it as 4095 + 61 (immediate + inline constant). The
highest offset for which we can do this correctly is 4156 = 4092 + 64.

Fixes dEQP-GLES31.functional.ssbo.atomic.*

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D37850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315302 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll