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[Hexagon] Optimize addressing modes for load/store
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>
Fri, 29 Apr 2016 15:49:13 +0000 (15:49 +0000)
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>
Fri, 29 Apr 2016 15:49:13 +0000 (15:49 +0000)
commit744cc49078e53f54aaea93b6db45095c55a7a1e9
tree48d5e7858fe228b250876a582916b3c4f79db16etree | snapshot
parent2fd54348aea744f9367c1d7a03f1b8d865d386c1commit | diff
[Hexagon] Optimize addressing modes for load/store

Patch by Jyotsna Verma.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268051 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/Hexagon/CMakeLists.txt diff | blob | history
lib/Target/Hexagon/Hexagon.td diff | blob | history
lib/Target/Hexagon/HexagonInstrInfo.cpp diff | blob | history
lib/Target/Hexagon/HexagonInstrInfo.h diff | blob | history
lib/Target/Hexagon/HexagonOptAddrMode.cpp [new file with mode: 0644] blob
lib/Target/Hexagon/HexagonTargetMachine.cpp diff | blob | history
lib/Target/Hexagon/RDFLiveness.cpp diff | blob | history
lib/Target/Hexagon/RDFLiveness.h diff | blob | history
test/CodeGen/Hexagon/opt-addr-mode.ll [new file with mode: 0644] blob
test/CodeGen/Hexagon/tls_pic.ll diff | blob | history
test/CodeGen/Hexagon/tls_static.ll diff | blob | history
test/CodeGen/Hexagon/zextloadi1.ll diff | blob | history
external/llvm
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