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drm/i915: Fix cdclk bypass freq readout for tgl/bxt/glk
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 11 Sep 2019 13:31:26 +0000 (16:31 +0300)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 12 Sep 2019 09:42:38 +0000 (10:42 +0100)
commit74689ddfb7574e2bf08c7206a4ab0dff04978b05
tree00b143e9e09773bf2f49b1e13548c8ad555cca4e
parent249778704c01384d76984d83e6d6377ac96b2cc4
drm/i915: Fix cdclk bypass freq readout for tgl/bxt/glk

On tgl/bxt/glk the cdclk bypass frequency depends on the PLL
reference clock. So let's read out the ref clock before we
try to compute the bypass clock.

Cc: Matt Roper <matthew.d.roper@intel.com>
Fixes: 71dc367e2bc3 ("drm/i915: Consolidate bxt/cnl/icl cdclk readout")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190911133129.27466-1-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/display/intel_cdclk.c