[DAG] check more operands for cycles when merging stores.

[DAG] check more operands for cycles when merging stores.

Until now, we've only checked whether merging stores would cause a cycle via
the value argument, but the address and indexed offset arguments are also
capable of creating cycles in some situations.

The addresses are all base+offset with notionally the same base, but the base
SDNode may still be different (e.g. via an indexed load in one case, and an
ISD::ADD elsewhere). This allows cycles to creep in if one of these sources
depends on another.

The indexed offset is usually undef (representing a non-indexed store), but on
some architectures (e.g. 32-bit ARM-mode ARM) it can be an arbitrary value,
again allowing dependency cycles to creep in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345200 91177308-0d34-0410-b5e6-96231b3b80d8