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(parent: 6114f71) | patch
drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0
authorJani Nikula <jani.nikula@intel.com>
Thu, 9 Sep 2021 12:52:01 +0000 (15:52 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 20 Sep 2021 15:46:40 +0000 (18:46 +0300)
commit79ac2b1bc9b9a1bc17b52263d940be075aa55982
tree297ec232c3b5397f74acf5f55f2a815ad288d764tree | snapshot
parent6114f71b3953407148158476b81c5eb082ef142bcommit | diff
drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0

Set the DP 2.0 128b/132b channel encoding for UHBR rates.

v2: Fix UHBR port clock check, use intel_dp_is_uhbr()

Bspec: 54128
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c88b08d80a96d1229ae941b296590633be4d8711.1631191763.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c diff | blob | history
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