ART: Correct disassembling of regs from opcodes

ART: Correct disassembling of regs from opcodes

Registers, which are part of opcode might have 1-byte size
or 2-byte size depending on the instruction and 66h prefix.
This patch makes the decoding of such instruction correct.

Examples:
  - '664155' should be decoded as 'push r13w'
    (66h + REX.B)

  - '41B320' should be decoded as 'mov r11l, 0x20'
    (byte-operand + REX.B)

Change-Id: I83913e3a5f2ef03c4019c0f5eea6b11fc51ee4cc
Signed-off-by: Vladimir Kostyukov <vladimir.kostyukov@intel.com>