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drm/amd/display: Update clock table to include highest clock setting
authorSwapnil Patel <Swapnil.Patel@amd.com>
Wed, 1 Mar 2023 19:33:33 +0000 (14:33 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 6 Mar 2023 20:27:31 +0000 (15:27 -0500)
commit7a1bb27b6ba8a05b51c1589dd9d53eb43a9e9843
treee06837d09de95bd560d004c80c4c4e1c746503d4
parentc1aafd6399a3fd35594778acc618075e1bac81d4
drm/amd/display: Update clock table to include highest clock setting

[Why]
Currently, the clk manager matches SocVoltage with voltage from
fused settings (dfPstate clock table). And then corresponding clocks
are selected.

However in certain situations, this leads to clk manager not
including at least one entry with highest supported clock setting.

[How]
Update the clk manager to include at least one entry with highest
supported clock setting.

Reviewed-by: Pavle Kotarac <pavle.kotarac@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Swapnil Patel <Swapnil.Patel@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c