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drm/i915/icl: Define DSI transcoder timing registers
authorMadhav Chauhan <madhav.chauhan@intel.com>
Mon, 15 Oct 2018 14:28:02 +0000 (17:28 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 22 Oct 2018 12:14:30 +0000 (15:14 +0300)
commit7b56caf36376f6d714a56ae42865da0a5ef7b2fc
treef7d90d12af672cd13ab60a267c6920f5128abc55tree | snapshot
parent70f4f502c47e9c541b0ae329440a7fe809cc5211commit | diff
drm/i915/icl: Define DSI transcoder timing registers

This patch defines registers and bitfields used for
programming DSI transcoder's horizontal and vertical
timings.

v2: Remove TRANS_TIMING_SHIFT definition

v3 by Jani:
 - Group macros by transcoder

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/dcc329280e3aca5b4fc3482c5bcaa0cac043c5d8.1539613303.git.jani.nikula@intel.com
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
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