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arm64: cache: change ARCH_DMA_MINALIGN and L1_CACHE_SHIFT values
authorImran Khan <kimran@codeaurora.org>
Mon, 3 Apr 2017 07:41:18 +0000 (13:11 +0530)
committerGerrit - the friendly Code Review server <code-review@localhost>
Tue, 18 Apr 2017 15:04:28 +0000 (08:04 -0700)
commit7b9683892c75db3778cadb9fde2e92e7e2887d81
tree6bccfea4d9a3a4bae208ae8ecfe35217677d719c
parent7f0d77b390e15aa9ea4b517aec21a0e88e02f5a0
arm64: cache: change ARCH_DMA_MINALIGN and L1_CACHE_SHIFT values

This reverts 'commit 97303480753e ("arm64: Increase the max
granular size") and also sets ARM_DMA_MINALIGN to 128.
ARCH_DMA_MINALIGN is dependent on L1_CACHE_SHIFT but it should
be set to maximum *known* cache line size on ARMv8 systems to
avoid DMA coherecy issues. So setting ARM_DMA_MINALIGN to 128.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Change-Id: Ie771d1b693789fce8793538a6efddfe68e2a0043
Patch-mainline: linux-kernel @ 21/03/16, 17:14:03
Signed-off-by: Imran Khan <kimran@codeaurora.org>
arch/arm64/include/asm/cache.h
arch/arm64/kernel/cpufeature.c