OSDN Git Service

[AMDGPU] Enable base pointer.
authorChristudasan Devadasan <Christudasan.Devadasan@amd.com>
Tue, 21 Apr 2020 09:34:33 +0000 (15:04 +0530)
committerChristudasan Devadasan <Christudasan.Devadasan@amd.com>
Sun, 17 May 2020 10:43:55 +0000 (16:13 +0530)
commit7c4e711ef8d8500349d7b33910f53edbb676fa67
treef1262558e8fefe025757a7e7b37a5caf29832eff
parentd23131a3c063830e3d8d4f7d43cbcf95d92db3d3
[AMDGPU] Enable base pointer.

When the callee requires a dynamic stack realignment,
it is not possible to correcty access the incoming
stack arguments using the stack pointer. We reserve a
base pointer in such cases to access the function arguments
inside the callee. The base pointer will hold the incoming
stack pointer value before any kind of delta added to it.

Reviewed By: arsenm, scott.linder

Differential Revision: https://reviews.llvm.org/D78811
llvm/docs/AMDGPUUsage.rst
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
llvm/test/CodeGen/AMDGPU/stack-realign.ll