OSDN Git Service

AMDGPU: M0 operands to spill/restore opcodes are dead
authorNicolai Haehnle <nhaehnle@gmail.com>
Tue, 27 Jun 2017 08:04:13 +0000 (08:04 +0000)
committerNicolai Haehnle <nhaehnle@gmail.com>
Tue, 27 Jun 2017 08:04:13 +0000 (08:04 +0000)
commit7ca35760c51f2d4dbbb66e9c947c9c1bcb2b9381
tree497e94b1bca11c2472cb932edcc2526aaee6ee51
parent1921b1c5edce46992c8b095479e96ac46290ae6e
AMDGPU: M0 operands to spill/restore opcodes are dead

Summary:
With scalar stores, M0 is clobbered and therefore marked as implicitly
defined. However, it is also dead.

This fixes an assertion when the Greedy Register Allocator decides to
optimize a spill/restore pair away again (via tryHintsRecoloring).

Reviewers: arsenm

Subscribers: qcolombet, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33319

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306375 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIInstrInfo.cpp
test/CodeGen/AMDGPU/spill-to-smem-m0.ll [new file with mode: 0644]