Subzero. Fixes a bug in the register allocator.
This bug was uncovered While implementing the llvm.nacl.atomic.cmpxchg
lowering for i64 for ARM32. For reference, the lowering is
retry:
ldrexd tmp_i, tmp_i+1 [addr]
cmp tmp_i+1, expected_i+1
cmpeq tmp_i, expected_i
strexdeq success, new_i, new_i+1, [addr]
movne expected_i+1, tmp_i+1
movne expected_i, tmp_i
cmpeq success, #0
bne retry
mov dest_i+1, tmp_i+1
mov dest_i, tmp_i
The register allocator would allocate r4 to both success and new_i,
which is clearly wrong (expected_i is alive thought the cmpxchg loop.)
Adding a fake-use(new_i) after the loop caused the register allocator
to fail due to the impossibility to allocate a register for an infinite
weight register. The problem was being caused for not evicting live
ranges that were assigned registers that alias the selected register.
BUG=
R=kschimpf@google.com, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1373823006 .