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[X86] Disable speculative load hardening for operations with an explicit RSP base.
authorCraig Topper <craig.topper@intel.com>
Fri, 10 May 2019 22:03:33 +0000 (22:03 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 10 May 2019 22:03:33 +0000 (22:03 +0000)
commit7cf9cd64e41aade956f3d7fa4a0d7c0ab5bc76bd
tree65ee991a00b1abd579765952cd7a2c675a2c09f2
parent5384b365ba9852ddab964e6eb17a207ffc08eaaa
[X86] Disable speculative load hardening for operations with an explicit RSP base.

After D58632, we can create idempotent atomic operations to the top of stack.
This confused speculative load hardening because it thinks accesses should have
virtual register base except for the cases it already excluded.

This commit adds a new exclusion for this case. I'll try to reduce a test case
for this, but this fix was verified to work by the reporter. This should avoid
needing to revert D58632.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360475 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86SpeculativeLoadHardening.cpp