clk: samsung: Add CLK_SET_RATE_PARENT to some AUDSS CLK CON clocks

clk: samsung: Add CLK_SET_RATE_PARENT to some AUDSS CLK CON clocks

This allows clk rate propagation up to the clock tree so EPLL
can be reprogrammed indirectly when setting rate of the Audio
Subsystem clocks.
The advantage is that sound machine driver can operate only
on the leaf clocks rather than explicitly re-configuring
the root clock (EPLL).

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>