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(parent: e10deca) | patch
Add more ARM instruction encodings for 's' bit set and "rs" register encoding
authorBob Wilson <bob.wilson@apple.com>
Mon, 26 Oct 2009 22:34:44 +0000 (22:34 +0000)
committerBob Wilson <bob.wilson@apple.com>
Mon, 26 Oct 2009 22:34:44 +0000 (22:34 +0000)
commit7e053bb33ca68e815f032fefb9ab7e45a455369f
treea4f84d2cac2fa3272034558767f85b2444374c48tree | snapshot
parente10deca33e74a7c70ab585f78eee3fb52937f668commit | diff
Add more ARM instruction encodings for 's' bit set and "rs" register encoding
bits.  Patch by Johnny Chen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85167 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td diff | blob | history
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