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Fix machine instruction in test case
authorSanjoy Das <sanjoy@playingwithpointers.com>
Mon, 19 Jun 2017 22:35:48 +0000 (22:35 +0000)
committerSanjoy Das <sanjoy@playingwithpointers.com>
Mon, 19 Jun 2017 22:35:48 +0000 (22:35 +0000)
commit7ef9a64157c5871d47b14aa0cc76aff0b49f3739
treea9e49aaee336124b05722d58d10e9a71c5da8150
parentf1934002e0ff588417da02bee095cb67c50ed42e
Fix machine instruction in test case

The AMD64rm instruction used in the test case was incorrect.  Since
the first input register to AND64rm is tied to output register, they
must be the same.

Thanks for Jesper Antonsson for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305756 91177308-0d34-0410-b5e6-96231b3b80d8
test/CodeGen/X86/implicit-null-checks.mir